Skip to content

ci: ci.yml introduce riscv64 linux and musllinux to wheels build#1666

Open
eshattow wants to merge 1 commit into
python-zeroconf:masterfrom
eshattow:workflow-ci-riscv64
Open

ci: ci.yml introduce riscv64 linux and musllinux to wheels build#1666
eshattow wants to merge 1 commit into
python-zeroconf:masterfrom
eshattow:workflow-ci-riscv64

Conversation

@eshattow
Copy link
Copy Markdown

Let's add the build and publish of RISC-V architecture to the workflows using qemu split target strategy similar to how this is currently done for armv7l

Relative build duration comparison:

0h 49m 01s qemu split strategy on RISE RISC-V Runners ubuntu-24.04-riscv
1h 51m 48s default strategy RISE RISC-V Runners ubuntu-24.04-riscv
0h 55m 28s qemu split strategy on GitHub Actions runners ubuntu-latest

I'm sending this PR with changes aligned with the latter strategy (qemu split on GitHub Actions runners) as it fits closest to the existing build system and does not involve any decision making on whether to integrate the RISE RISC-V Runners add-on from GitHub marketplace to the repo; and the build time is comparable or favorable, even.

Resolves: #1665

@codspeed-hq
Copy link
Copy Markdown

codspeed-hq Bot commented Apr 29, 2026

Merging this PR will not alter performance

✅ 6 untouched benchmarks


Comparing eshattow:workflow-ci-riscv64 (8e703fa) with master (0e94c25)

Open in CodSpeed

@codecov
Copy link
Copy Markdown

codecov Bot commented Apr 29, 2026

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 99.76%. Comparing base (0e94c25) to head (8e703fa).

Additional details and impacted files
@@           Coverage Diff           @@
##           master    #1666   +/-   ##
=======================================
  Coverage   99.76%   99.76%           
=======================================
  Files          33       33           
  Lines        3401     3401           
  Branches      461      461           
=======================================
  Hits         3393     3393           
  Misses          5        5           
  Partials        3        3           

☔ View full report in Codecov by Sentry.
📢 Have feedback on the report? Share it here.

🚀 New features to boost your workflow:
  • ❄️ Test Analytics: Detect flaky tests, report on failures, and find test suite problems.
  • 📦 JS Bundle Analysis: Save yourself from yourself by tracking and limiting bundle sizes in JS merges.

@eshattow eshattow force-pushed the workflow-ci-riscv64 branch from 5befd46 to 595dbec Compare April 29, 2026 23:25
Comment thread .github/workflows/ci.yml Outdated
Comment thread .github/workflows/ci.yml Outdated
@bdraco bdraco changed the title workflows: ci.yml introduce riscv64 linux and musllinux to wheels build ci: ci.yml introduce riscv64 linux and musllinux to wheels build Apr 30, 2026
@eshattow eshattow force-pushed the workflow-ci-riscv64 branch 2 times, most recently from fb8be59 to f22f1ee Compare May 1, 2026 21:10
@eshattow
Copy link
Copy Markdown
Author

eshattow commented May 1, 2026

force pushed with requested changes rolled into single commit, resolves linter reported errors in commit subject formatting

@eshattow
Copy link
Copy Markdown
Author

eshattow commented May 2, 2026

I don't know what to suggest to fix the more general workflow problems on this repository for external contributions, tracking issue for that is #1668

Adding RISC-V architecture to build and publish workflow via QEMU

Dropped pyver 3.9 from riscv64 as suggested in code review

Co-authored-by: J. Nick Koston <nick+github@koston.org>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

Build and publish RISC-V architecture

2 participants