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viv27/README.md

Hi there 👋

  • 🔭 Computer Engineering Graduate Student focusing on Computer Architecture, FPGA and VLSI
  • 📫 How to reach me: Twitter - @vivekmohan27

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  1. RTL_Toolchain RTL_Toolchain Public

    Python toolchain that autogenerates synthesizable Verilog RTL from a JSON ISA specification control unit decoder, ROM based control unit, and testbench for a custom 16-bit processor ISA.

    Verilog

  2. RTL_Post_Processor RTL_Post_Processor Public

    Python tool that automatically detects registers without clock enables in Verilog RTL and inserts latch-based clock gating cells, reduces dynamic power consumption; outputs modified Verilog and JSO…

    Python

  3. FPGA FPGA Public

    My FPGA Code!

    Verilog

  4. Netflix-Clone Netflix-Clone Public

    Netflix Clone built with React

    JavaScript 1

  5. Mario-Gram-App Mario-Gram-App Public

    Instagram clone built with React + Firebase + Material-UI

    JavaScript 1

  6. Hacker-news-clone Hacker-news-clone Public

    Hacker News Clone

    JavaScript 1