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Waveshare ESP32-S3-Touch-LCD-3.5: LCD SPI clock 80 MHz - #303

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ThomasFarstrike merged 1 commit into
MicroPythonOS:mainfrom
bitcoin3us:board/waveshare-3.5-spi-80mhz
Sep 28, 2026
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ThomasFarstrike merged 1 commit into
MicroPythonOS:mainfrom
bitcoin3us:board/waveshare-3.5-spi-80mhz

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@bitcoin3us

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Change

SPI_FREQ for the Waveshare ESP32-S3-Touch-LCD-3.5 board file goes from 40 to 80 MHz.

Measurements (on the board)

Pushing the driver's own 30 KB DMA strips straight through lcd_bus with LVGL paused (so no rendering cost, no queueing):

LCD SPI clock Full 480x320 frame Effective rate Full-screen ceiling
40 MHz 74.6 ms 4.8 MB/s 13 fps
80 MHz 41.4 ms 7.4 MB/s 24 fps

Panel output was inspected by eye at 80 MHz across several boots: no noise, tearing or shifted rows. The LCD pins (SCLK 5, MOSI 1, MISO 2) go through the GPIO matrix and 80 MHz still worked.

Note for anyone tempted by a middle value: the ESP32-S3 SPI master divides 80 MHz by an integer, so a 60 MHz request silently becomes 40 MHz (measured identical to 40). The only step up from 40 is 80.

Caveat

The ST7796's datasheet write-clock limit is 62.5 MHz, so this runs the panel above spec; it has been stable on the one board tested here. If a unit shows artefacts, the fallback is the previous value.

🤖 Generated with Claude Code

With thanks to the scientists and engineers who did the hard, unglamorous work that got us here.

Measured on hardware: a full 480x320 RGB565 frame pushed straight through
the bus takes 74.6 ms at 40 MHz (4.8 MB/s) and 41.4 ms at 80 MHz, with a
clean panel by eye. The ESP32-S3 SPI master divides 80 MHz by an integer,
so 60 MHz silently rounds down to 40; 80 is the only step up. This raises
the full-screen refresh ceiling from 13 to 24 fps.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
@ThomasFarstrike

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Sweet! I can't wait to try this out on other boards as well!

@ThomasFarstrike
ThomasFarstrike merged commit b8da2bb into MicroPythonOS:main Sep 28, 2026
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2 participants